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ïðîñèì ïðèíÿòü ó÷àñòèå â îïðîñåçàïîëíèòü àíêåòó

×åðåìèñèíîâà Ëþäìèëà Äìèòðèåâíà

×åðåìèñèíîâà Ëþäìèëà Äìèòðèåâíà×åðåìèñèíîâà Ëþäìèëà Äìèòðèåâíà – ãëàâíûé íàó÷íûé ñîòðóäíèê ëàáîðàòîðèè ëîãè÷åñêîãî ïðîåêòèðîâàíèÿ Îáúåäèíåííîãî èíñòèòóòà ïðîáëåì èíôîðìàòèêè ÍÀÍ Áåëàðóñè, äîêòîð òåõíè÷åñêèõ íàóê.

Îáëàñòü íàó÷íûõ èíòåðåñîâ: ëîãè÷åñêèå ìåòîäû â ïðèëîæåíèè ê âû÷èñëèòåëüíîé òåõíèêå, òåîðèÿ äèñêðåòíûõ óïðàâëÿþùèõ óñòðîéñòâ, àâòîìàòèçàöèÿ ëîãè÷åñêîãî ïðîåêòèðîâàíèÿ.

Ðåçóëüòàòû âûïîëíåííûõ èññëåäîâàíèé èçëîæåíû â áîëåå ÷åì 220 ïóáëèêàöèÿõ, â òîì ÷èñëå â 10 ìîíîãðàôèÿõ.




Èçáðàííûå íàó÷íûå òðóäû ïîñëåäíèõ ëåò:

1. Optimization in Boolean space. – TUT Press, 2009, 241 p. (ñîàâò. Çàêðåâñêèé À.Ä., Ïîòòîñèí Þ.Â.).

2. Design of Logical Control Devices. – TUT Press, 2009, 304 p. (ñîàâò. Çàêðåâñêèé À.Ä., Ïîòòîñèí Þ.Â.).

3. Combinatorial algorithms of discrete mathematics. – TUT Press, 2008, 192 p. (ñîàâò. Çàêðåâñêèé À.Ä., Ïîòòîñèí Þ.Â.).

4. Ëîãè÷åñêèå îñíîâû ïðîåêòèðîâàíèÿ äèñêðåòíûõ óñòðîéñòâ. – Ì.: Ôèçìàòëèò, 2007. – 589 c. (ñîàâò. Çàêðåâñêèé À.Ä., Ïîòòîñèí Þ.Â.).

5. Ñèíòåç è îïòèìèçàöèÿ êîìáèíàöèîííûõ ñòðóêòóð ÑÁÈÑ. – Ìí.: ÎÈÏÈ ÍÀÍ Áåëàðóñè, 2005. – 236 ñ.

6. Ðåàëèçàöèÿ ïàðàëëåëüíûõ àëãîðèòìîâ ëîãè÷åñêîãî óïðàâëåíèÿ. – Ìèíñê: Èí-ò òåõíè÷åñêîé êèáåðíåòèêè ÍÀÍ Áåëàðóñè, 2002. – 246 ñ.

7. VLSI Regular Structure Folding via Boolean Satisfiability // 9th Int. Workchop on Boolean problems, Freiberg (Sachsen), Sept. 16–17, 2010. – P. 91–96.

8. SAT based Implicative Method of Implementation Checking for Incompletely Specified Boolean Functions // 9th Int. Workchop on Boolean problems, Freiberg (Sachsen), Sept. 16–17, 2010. – P. 97–102 62 (ñîàâò. Íîâèêîâ Ä.ß.).

9. Multiple Folding of VLSI Regular Structure via Boolean Satisfiability // Information Models of Knowledge. – ITHEA: Kiev–Sofia, 2010. – P. 411–419.

10. Simple constrained folding of programmable logic arrays of special type // Information Models of Knowledge. – ITHEA: Kiev–Sofia, 2010. – P. 420–428 (ñîàâò. Ëîãèíîâà È.Ï.).

11. SAT based method of implementation checking for incompletely specified Boolean functions // Computer-Aided Design of Discrete Devices CAD DD’10. Proc.of the 7th Intern.Conf., Minsk, Nov. 16–17, 2010. –Ìí.: ÎÈÏÈ ÍÀÍ Áåëàðóñè. – 2010. – P. 226–233 (ñîàâò. Íîâèêîâ Ä.ß.).

12. Ôîðìàëüíàÿ âåðèôèêàöèÿ îïèñàíèé ñ ôóíêöèîíàëüíîé íåîïðåäåëåííîñòüþ íà îñíîâå ïðîâåðêè âûïîëíèìîñòè êîíúþíêòèâíîé íîðìàëüíîé ôîðìû // Àâòîìàòèêà è âû÷èñëèòåëüíàÿ òåõíèêà. – 2010. – ¹ 1. – C. 5–16 (ñîàâò. Íîâèêîâ Ä.ß.).

13. Cèíòåç êîìáèíàöèîííûõ ÊÌÎÏ ñõåì ñ ó÷åòîì ýíåðãîñáåðåæåíèÿ // Èíôîðìàòèêà. – 2010. – ¹ 4. – Ñ. 112–122.

14. Âåðèôèêàöèÿ ôóíêöèîíàëüíûõ îïèñàíèé ñ íåîïðåäåëåííîñòüþ íà îñíîâå ïàðàôàçíîãî ïðåäñòàâëåíèÿ áóëåâûõ ôóíêöèé // Èíôîðìàòèêà. – 2010. – ¹ 3(27) . – Ñ. 54 – 62 (ñîàâò. Íîâèêîâ Ä.ß.).

15. Îöåíêà ýíåðãîïîòðåáëåíèÿ ïðè îïòèìèçàöèè äâóõóðîâíåâûõ ÊÌÎÏ ñõåì // Èíôîðìàòèêà. – 2010. – ¹ 2(26). – Ñ. 105–115.

16. Îöåíêà ýíåðãîïîòðåáëåíèÿ ÊÌÎÏ-ñõåì íà ëîãè÷åñêîì óðîâíå // Èíôîðìàöèîííûå òåõíîëîãèè. – 2010. – ¹ 8. – Ñ. 27–35.

17. SAT-Based Group Method for Verification of Logical Descriptions with Functional Indeterminacy // 7th IEEE East-West Design & Test Symposium (EWDTS 2009). Moscow, Russia, September 18–21, 2009, p. 31–34 62 (ñîàâò. Íîâèêîâ Ä.ß.).

18. SAT-based method of verification using logarithmic encoding // Knowledge-Dialogue-Solution. Intern. Book Series, No 15, Suppl. to the Intern. J. “Information Technologies & Knowledge” V. 3/2009. – Bulgaria: ITHEA, Sofia, 2009, p. 107–114 62 (ñîàâò. Íîâèêîâ Ä.ß.).

19. Ìèíèìèçàöèÿ íà òîïîëîãè÷åñêîì óðîâíå ïëîùàäè ðåãóëÿðíûõ ñõåì ñ ïîñëåäîâàòåëüíûì ñîåäèíåíèåì ÌÎÏ‑òðàíçèñòîðîâ // Èíôîðìàòèêà, 2009, ¹ 2(22), ñ. 102–113 (ñîàâò. Ëîãèíîâà È.Ï.).

20. Âåðèôèêàöèÿ ìíîãîáëî÷íûõ ñòðóêòóð ñ ôóíêöèîíàëüíîé íåîïðåäåëåííîñòüþ // Èçâåñòèÿ ÍÀÍ Áåëàðóñè, ñåðèÿ ôèçèêî-òåõí. íàóê, 2009, ¹ 2, ñ. 98–105 (ñîàâò. Íîâèêîâ Ä.ß.).

21. Formalization of interaction events in Multi-agent Systems // Information Technologies & Knowledge (IJ ITK), 2008, V. 2, No. 2, ð. 159–165 (ñîàâò. ×åðåìèñèíîâ Ä.È.).

22. Simulation-based approach to verification of logical descriptions with functional indeterminacy // Information Theories & Applications (IJ ITA), 2008, V. 15, No. 3, ð. 218–224 (ñîàâò. Íîâèêîâ Ä.È.).

23. The Approach to Programming Agent-Based Systems // 8th Int. Workchop on Boolean problems, Freiberg (Sachsen), Sept. 18–19, 2008. – 2008. – P.75–82 62 (ñîàâò. ×åðåìèñèíîâ Ä.È.).

24. SAT-Based Approach to Verification of Logical Descriptions with Functional Indeterminacy // 8th Int. Workchop on Boolean problems, Freiberg (Sachsen), Sept. 18–19, 2008. – 2008. – P. 59–66 62 (ñîàâò. Íîâèêîâ Ä.ß.).

25. Using SAT for Combinational Implementation Checking // Artificial Intelligence and Decision Making. Intern. Book Series, No 4, V. 2/2008. – Bulgaria: ITHEA, Sofia, 2008. C. 203–210 62 (ñîàâò. Íîâèêîâ Ä.ß.).

26. Òîïîëîãè÷åñêàÿ îïòèìèçàöèÿ ðåãóëÿðíûõ ÌÎÏ‑ñòðóêòóð ìåòîäîì äâóäîëüíîé ñâåðòêè // Èíôîðìàòèêà, 2008, ¹ 2(18), ñ. 92–101.

27. Ïðîãðàììèðîâàíèå àãåíòîâ íà ÿçûêå ÏÐÀËÓ // Àâòîìàòèêà è âû÷èñëèòåëüíàÿ òåõíèêà, 2008, ¹ 4, ñ. 14–26 (ñîàâò. ×åðåìèñèíîâ Ä.È.).

28. Ïðîâåðêà ñõåìíîé ðåàëèçàöèè ÷àñòè÷íûõ áóëåâûõ ôóíêöèé // Âåñòíèê Òîìñêîãî ãîñ. óíèâåðñèòåòà. Óïðàâëåíèå, âû÷èñëèòåëüíàÿ òåõíèêà è èíôîðìàòèêà. – 2008. – ¹ 4(5), ñ. 102–111 (ñîàâò. Íîâèêîâ Ä.ß.).

29. The specification of agent interaction in multi-agent systems // Proc. Fifth Intern. Conf. “Information Research & Applications” (i.tech 2007), June 26–30, Varna, Bulgaria, 2007. – ITHEA SOFIA, 2007. – P. 428 –434 (ñîàâò. ×åðåìèñèíîâ Ä.È.).

30. Technology of programming a cluster computer by means of the removed terminal with operational system Windows // Information Theories and Applications (IJ ITA), 2007, V. 14, No. 4, P. 381 – 388 (ñîàâò. ×åðåìèñèíîâ Ä.È.)

31. Bipartite folding of regular matrix MOS‑structures // Computer-Aided Design of Discrete Devices CAD DD’07. Proc.of the Sixth Intern.Conf., Minsk, Nov. 14–15, 2007. – V. 1. – Ìí.: ÎÈÏÈ ÍÀÍ Áåëàðóñè, 2007. – P. 197 – 205.

32. Verification of multi-block structures with functional indeterminacy // Computer-Aided Design of Discrete Devices CAD DD’07. Proc.of the Sixth Intern.Conf., Minsk, Nov. 14–15, 2007. – V. 2. – Ìí.: ÎÈÏÈ ÍÀÍ Áåëàðóñè, 2007. – P. 95 – 102 (ñîàâò. Íîâèêîâ Ä.ß.).

33. Íàõîæäåíèå îòíîøåíèÿ ïàðàëëåëüíîñòè íà ìíîæåñòâå öåïî÷åê àëãîðèòìà óïðàâëåíèÿ // Èíôîðìàòèêà, 2007, ¹ 1(13). – Ñ. 5–15.

34. Developing Agent Interaction Protocols with PRALU // Information Theories & Applications (IJ ITA). – 2006. ‑ Vol.13. ‑ ¹ 3. ‑ P. 239‑246 (ñîàâò. ×åðåìèñèíîâ Ä.È.).

35. Some aspects of logical control systems design using PRALU // Proc. of 3rd IFAC Workshop on Discrete Event System Design (DESDes’06). September 26-28, 2006. ‑ Rydzyna, Poland: University of Zielona Gora. ‑ P. 43‑48 (ñîàâò. ×åðåìèñèíîâ Ä.È.).

36. Òîïîëîãè÷åñêàÿ îïòèìèçàöèÿ ìàòðè÷íûõ ñòðóêòóð ìåòîäîì äâóäîëüíîé ñâåðòêè // Èçâåñòèÿ ÍÀÍ Áåëàðóñè, ñåðèÿ ôèçèêî-òåõí. íàóê, 2006, ¹ 4, C. 83–92.

37. Êîìïëåêñ ïðîãðàìì ñèíòåçà ëîãè÷åñêèõ ñõåì íà áàçå ïðîãðàììèðóåìûõ ëîãè÷åñêèõ èíòåãðàëüíûõ ñõåì // Èíôîðìàòèêà. – 2006. ‑ ¹ 3(11). ‑ C. 112–121.

38. Optimal State Assignment of Asynchronous Parallel Automata behavior // Design of Embedded Control Systems / Eds. M.A.Adamski, A.Karatkevich, M.Wegrzin. – New York: Springer, 2005. – P. 125–137.

39. Specifying agent interaction protocols with Parallel control algorithms // Proc. XI-th Intern. Conference «Knowledge-Dialogue-Solution. KDS 2005», June 20-30, 2005, Varna, Bulgaria. – Sofia: FOI-COMMERCE, 2005. – V. 2. – P. 496–503 (ñîàâò. ×åðåìèñèíîâ Ä.È.).

40. Ìåòîä ìèíèìèçàöèè ïëîùàäè ðåãóëÿðíûõ ìàòðè÷íûõ ñòðóêòóð // Âåñòíèê Òîìñêîãî ãîñóäàðñòâåííîãî óíèâåðñèòåòà. Ïðèëîæåíèå ¹ 14, àâãóñò 2005 ã. – Ñ. 242–247.